1. Field of the Invention
The invention relates to the field of microelectronics fabrication. More specifically, the invention relates to the field of photo fabrication of integrated circuit microelectronics fabrications.
2. Description of the Related Art
Modern electronics circuits are commonly fabricated employing substrates upon which multiple layers of conductor, insulator and specialized materials are sequentially formed into patterns which make up the component elements of the circuits. In the fabrication of microelectronics circuitry, the intimate integration of multiple patterned layers and the semiconductor substrate have led to the generic term xe2x80x9cintegrated circuitxe2x80x9d to describe this class of electronic devices. The fabrication of these semiconductor integrated circuit microelectronics devices has been driven to develop methods of increasingly more accurate control of increasingly finer pattern dimensions in order to produce higher circuit density and reduce the cost per circuit. The greater complexity of the resulting high density circuit designs has required that a sophisticated photofabrication technology be developed which employs the use of patterned photomask stencils to provide the necessary pattern images in photosensitive surface layers formed over the various multiple layers of the integrated circuit device. These patterned layers, after development of the images produced therein by exposure to the photomasks, allow the replication of the patterns in the surface layers by methods such as subtractive etching, selective deposition and so forth. The repetitive employment of such pattern formation methods on the multiple layers forms the complex multilayer structures comprising such integrated circuit fabrications to be manufactured on the semiconductor substrate.
The repetition of photomask exposure, photoresist development, and fabrication steps places a stringent requirement on the precise alignment of each succeeding photomask to the previously fabricated patterned surface layers. The alignment is conventionally accomplished by providing alignment marks within each pattern so that each photomask pattern may be aligned to the alignment marks of previously fabricated patterns on the semiconductor substrate. Modern photolithographic methods generally employ step-and-repeat methods to project a photomask pattern onto an integrated circuit substrate after the alignment marks already present in the existing patterns are located. The alignment marks are located by scanning with a laser light source and detecting the back-scattered light from the alignment marks. While the methods of generating and detecting alignment marks on photolithographic patterns currently employed within microelectronics integrated circuit fabrications are generally satisfactory, these current methods are not without problems.
For example, it is often necessary to deposit a blanket layer over the surface of the substrate which is then required to be coated with a photoresist layer and then exposed to the desired photomask pattern to fashion the appropriate pattern from the blanket layer. If the blanket layer is opaque to the radiation normally employed to scan for the alignment marks, the alignment marks may be difficult or impossible to detect with sufficient accuracy. For example, a commonly employed opaque material layer in microelectronics fabrications is epitaxial silicon, often formed to a thickness of several micrometers to increase collector thickness and increase collector breakdown voltage performance. Since this thickness is often many times the thickness of the underlying alignment marks, it becomes difficult or impossible to replicate the distinctness of the alignment mark edge features in the thicker overlying silicon layer. This is shown, for example, in FIG. 1, wherein the alignment mark 11 formed within a layer 12 on the substrate 10 is covered by an overlayer 14. This difficulty can be overcome by providing an additional photomasking operation to remove the opaque layer selectively from the alignment mark area, but this requires additional photolithographic masking and processing, which is costly.
An alignment mark or marks may be scanned by laser radiation to provide an alignment reference by employing the detection of the back-scattered laser radiation from the alignment marks, as shown in FIG. 2. However, the amount of back-scattered radiation 24 from a particular series of alignment marks such as the line of alignment marks 20 after coverage by a layer 22 as shown in FIG. 2 may not contain sufficient information to provide the alignment accuracy desired.
It is therefore towards the goal of providing an improved method for alignment of photomask patterns with alignment marks covered by opaque surface layers employed within microelectronics fabrications that the present invention is directed.
Various methods have been disclosed for alignment of alignment marks covered over by opaque surface layers employed within microelectronics fabrications.
For example, Cade, in U.S. Pat. No. 4,534,804, discloses a method for forming alignment marks within a silicon substrate which are visible on the surface of the substrate. The method employs a laser beam to be absorbed within a heavily doped interior region of a silicon substrate after passing through a more lightly doped surface layer. Subsequently the defects formed therein by the absorbed laser energy are caused to migrate to the surface by heating the substrate, whereby the region of absorption is rendered visible at the surface.
Further, Chatterjee, in U.S. Pat. No. 4,889,832, discloses a method for forming alignment marks on a silicon substrate which are visible from the backside of the substrate. The method employs selective subtractive etching away of the substrate layer to an etch stop layer until the remaining layer is sufficiently thin that the alignment marks on the front side of the substrate are visible and may be used for alignment purposes for pattern formation of layers on the backside of the substrate.
Still further, Takagi, in U.S. Pat. No. 5,017,512, discloses a method for forming a layer over a conductor layer on a semiconductor substrate which improves the efficiency of dicing the substrate into separate integrated circuit dies including the test site and alignment mark die locations. The layer is silicon nitride, which is harder than the underlying conductor layer and prevents fouling of the dicing saw by the softer conductor metal layer material.
Finally, Fujii et al., in U.S. Pat. No. 5,939,132, disclose a method for blanket metallization of a silicon substrate wafer with alignment marks on the periphery of individual circuit die patterns while avoiding covering over the alignment marks. The method employs peripheral substrate holders which cover over the peripheral alignment mark regions and prevent them from being covered over by metal when the substrate is metallized to fill in contact holes and provide the basis for interconnection conductor patterning,
Desirable in the art of microelectronics fabrication are additional methods for improved alignment of subsequent photomask patterns after deposition of opaque surface layers over existing alignment marks.
It is towards this goal that the present invention is generally and specifically directed.
A first object of the present invention is to provide a method for employing an alignment mark array, within a pattern formed upon a substrate employed within an electronics fabrication, with improved alignment capability to a subsequent photomask pattern employed in photolithographic pattern formation of an overlying material layer formed over the same substrate.
A second object of the present invention is to provide a method in accord with the first object of the present invention where the alignment of the photomask pattern by step-and-repeat method to the alignment mark array may be performed when the surface layer formed overlying the alignment mark array is opaque to the scanning radiation employed.
A third object of the present invention is to provide a method in accord with the first object of the present invention and the second object of the present invention, where the accuracy of the alignment of the photomask pattern of the opaque layer overlying the alignment mark array is enhanced.
A fourth object of the present invention is to provide a method in accord with the first object of the present invention, the second object of the present invention, and/or the third object of the present invention, where the method is readily commercially implemented.
In accord with the objects of the present invention, there is provided a method for alignment to an array of alignment marks, within a patterned microelectronic layer formed upon a substrate employed within an electronics fabrication, of a subsequent step-and-repeat photomask pattern to be formed within an overlying layer of material upon the substrate with improved registration. To practice the method of the present invention, there is provided a substrate upon which there is formed a layer or layers of microelectronic material in a pattern, the pattern containing an array of alignment marks. There is formed over the substrate and patterned layer an overlying layer of microelectronic material which covers the alignment marks and which may be opaque. In order to align properly a photomask pattern for patterning the overlying layer by means of conventional photolithography, the alignment marks are located by first scanning with a laser light source contained within a step-and-repeat apparatus containing the patterned photomask and detecting the back-scattered optical radiation from the alignment mark array. The accuracy of the location may be enhanced by rotating the orientation of the alignment mark array with respect to the direction of scanning with the laser light source by 90 degrees to render it orthogonal to the first orientation of the alignment mark array and the laser step-and-repeat scan and then repeating the scanning operation. The altered nature of the back-scattered radiation signal from the orthogonally altered scanning direction provides additional information for improving the precision of location and alignment of the photomask pattern to the alignment mark array.